The present invention relates to a structure for temperature compensating the inverse saturation current of bipolar transistors.
The emitter current I.sub.E of bipolar transistors (according to the Ebers-Moll equations; see, for example, P. R. Gray, R. G. Mayer, Analysis and Design of Analog Integrated Circuits, John Wiley & Sons, 1977, page 22) is the sum of two terms, one due to the voltage (V.sub.BE) applied to the base-emitter junction of the transistor, and the other to the inverse saturation current: ##EQU1## wherein the current entering the transistor is considered positive.
The second term in the above equation is normally negligible as compared with the first, but in the case of high temperatures and large area transistors, may become comparable with the first, in which case, it is no longer negligible. In fact (bearing in mind that .alpha..sub.R I.sub.CS =I.sub.S), this gives: ##EQU2## (I.E. Getreu, Modeling the Bipolar Transistor, Elsevier, page 21), where T is the temperature considered, T.sub.nom the nominal temperature (both in .degree.K.), and Eg the energy gap of the semiconductor material (in eV); and ##EQU3## (page 13 of the above text by P. R. Gray, R. G. Mayer), where A is the emitter area of the transistor, D.sub.n the electron diffusion constant, n.sub.i the concentration of intrinsic carriers in the semiconductor, and Q.sub.B the number of doping atoms in the base per area unit of the emitter.
According to equations (2) and (3), therefore, the inverse saturation current I.sub.CS increases alongside an increase in temperature (doubling roughly every 10.degree. C.), and also depends on the area of the transistor. Consequently, when the temperature of the semiconductor wafer portion integrating the transistor exceeds a given temperature (around 150.degree.-160.degree. C.), the second term comes into effect, i.e., a reduction in the emitter current occurs.
The reduction in emitter current caused by the second term in (1) may prove troublesome in certain applications, as, for example, in the case of a voltage reference or so-called "band-gap" circuit, a typical configuration of which is shown in FIG. 1. The known circuit, numbered 1, in FIG. 1 comprises two NPN transistors 2 and 3 having a definite area ratio (in this case, the emitter area of transistor 2 is ten times that of transistor 3): having their bases connected to each other and defining the output terminal 4 of the circuit: their collectors connected to supply V.sub.CC (first reference potential line) via respective current sources 5, 6; and their emitters connected together and to ground (second reference potential line). In more detail, the emitter terminal of transistor 2 is connected to the emitter terminal of transistor 3 via a resistor 7, and the common point 8 is grounded via a further resistor 9.
In the circuit shown, the output voltage V.sub.O equals the base-emitter voltage drop V.sub.BE1 of transistor 3 plus the voltage drop of resistor 9. That is, if DV.sub.BE is the voltage drop of resistor 7 (the difference between the base-emitter voltages of transistors 3 and 2); R.sub.7 the resistance of resistor 7; R.sub.9 the resistance of resistor 9: and assuming sources 5 and 6 supply the same current: this gives: ##EQU4## where ##EQU5## As long as the second term in (1) is negligible, (I.sub.E3 /I.sub.E2) remains substantially constant (these currents being set by sources 5 and 6 under normal operating conditions); (I.sub.S2 /I.sub.S3) equals the area ration of the two transistors and is therefore also constant: and difference DV.sub.BE varies oppositely to V.sub.BE3, thus maintaining a constant output voltage V.sub.o.
Under high temperature conditions, however, ratio (I.sub.E3 I.sub.E2) no longer remains constant, due to a differing variation in the voltage drops at the base-emitter junctions of transistors 2 and 3. That is, due to the larger area of transistor 2 as compared with 3, the second term in (1) first affects, or at any rate, is greater in transistor 2, so that the difference DV.sub.BE no longer varies oppositely to V.sub.BE3, thus varying the output voltage V.sub.o of the circuit, which is no longer capable of supplying an accurate reference voltage at high temperature.
It is an object of the present invention to provide a structure designed to compensate inverse saturation current even at temperatures at which said inverse current becomes comparable with the first term in (1).